diff -Nrcpad gcc-14-20251031/LAST_UPDATED gcc-14-20251107/LAST_UPDATED
*** gcc-14-20251031/LAST_UPDATED	Fri Oct 31 22:33:19 2025
--- gcc-14-20251107/LAST_UPDATED	Fri Nov  7 22:35:20 2025
***************
*** 1 ****
! Obtained from git: releases/gcc-14 revision dfb81b8cb5eb2fc4908beb65f367ea2d26ffa09c
--- 1 ----
! Obtained from git: releases/gcc-14 revision 08a4b75a5d73cf5dcdaf24b8374bbeaadb2e3887
diff -Nrcpad gcc-14-20251031/MD5SUMS gcc-14-20251107/MD5SUMS
*** gcc-14-20251031/MD5SUMS	Fri Oct 31 22:33:26 2025
--- gcc-14-20251107/MD5SUMS	Fri Nov  7 22:35:25 2025
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-14-20251031.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-14-20251107.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** fc9280b02bc68e4fb1ef8d51ccc25061  Change
*** 23,29 ****
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! fb3b857145f7f224a1db612678316e3e  LAST_UPDATED
  1671040823f8eb8436a06fdd18065e02  MAINTAINERS
  304c3887135aefa27c21292ec585b0a3  Makefile.def
  8dd93fbf2e32bcbd2faba10e3b8ba2b0  Makefile.in
--- 23,29 ----
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! 0c2c92a0443136bc94ec7fadb8b11ba9  LAST_UPDATED
  1671040823f8eb8436a06fdd18065e02  MAINTAINERS
  304c3887135aefa27c21292ec585b0a3  Makefile.def
  8dd93fbf2e32bcbd2faba10e3b8ba2b0  Makefile.in
*************** bc7394806417778d77541ba1ec0e4a70  gcc/BA
*** 505,511 ****
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 3e14a46b3a2526c661e4325a6baad19e  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
--- 505,511 ----
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! fa1cd1bcfeb47aa165a18d41c6e60e5d  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 541,547 ****
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! abab72064e43906129b6d4c29ac73c6f  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
--- 541,547 ----
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! 77f0f131cbc085c6924f9e77c349e2b4  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
*************** d64263b134031262a36428a26496f75e  gcc/co
*** 3605,3611 ****
  b69614df1cd4256f58e75a572fbda03a  gcc/config/arm/marvell-f-iwmmxt.md
  e8affac9772d93f38b77832072baa1de  gcc/config/arm/marvell-pj4.md
  f95aae25737fa2b67f658ae27a55bf24  gcc/config/arm/mmintrin.h
! 53da1c2f428f37c646ba59bf6c8e0f5b  gcc/config/arm/mve.md
  90755fdf5049c51974a29f7443aad437  gcc/config/arm/neon.md
  99dedecb099a6f7fef75514f6cfb51f6  gcc/config/arm/netbsd-eabi.h
  49dc7f194a7a56dbfa95c9d614987485  gcc/config/arm/netbsd-elf.h
--- 3605,3611 ----
  b69614df1cd4256f58e75a572fbda03a  gcc/config/arm/marvell-f-iwmmxt.md
  e8affac9772d93f38b77832072baa1de  gcc/config/arm/marvell-pj4.md
  f95aae25737fa2b67f658ae27a55bf24  gcc/config/arm/mmintrin.h
! 6983354a154e7c27b1af4bdda22843d9  gcc/config/arm/mve.md
  90755fdf5049c51974a29f7443aad437  gcc/config/arm/neon.md
  99dedecb099a6f7fef75514f6cfb51f6  gcc/config/arm/netbsd-eabi.h
  49dc7f194a7a56dbfa95c9d614987485  gcc/config/arm/netbsd-elf.h
*************** c57f11c8377690ba9023949f07b9355d  gcc/co
*** 3655,3661 ****
  e463aeaf15d36b313935a1486e19fe50  gcc/config/avr/avr-passes.def
  b812676480e10c55ca64c09cae522a6a  gcc/config/avr/avr-protos.h
  f6bd61a4d455db58f9425812a337b890  gcc/config/avr/avr-stdint.h
! c8063963aee784a28028e6e23db0757d  gcc/config/avr/avr.cc
  7cc3c5e2451b04c38f10f0bd06790ba0  gcc/config/avr/avr.h
  90199e05652dd3c55b8064a234c53d28  gcc/config/avr/avr.md
  d966b0c41bfba722c0e38c55d7256e8b  gcc/config/avr/avr.opt
--- 3655,3661 ----
  e463aeaf15d36b313935a1486e19fe50  gcc/config/avr/avr-passes.def
  b812676480e10c55ca64c09cae522a6a  gcc/config/avr/avr-protos.h
  f6bd61a4d455db58f9425812a337b890  gcc/config/avr/avr-stdint.h
! 9e7ce7238378c831c3f5f3897c925f2c  gcc/config/avr/avr.cc
  7cc3c5e2451b04c38f10f0bd06790ba0  gcc/config/avr/avr.h
  90199e05652dd3c55b8064a234c53d28  gcc/config/avr/avr.md
  d966b0c41bfba722c0e38c55d7256e8b  gcc/config/avr/avr.opt
*************** c303762800db2d03566efcca0c473770  gcc/co
*** 3664,3670 ****
  5f50128af85c97f8a945289b214c6796  gcc/config/avr/builtins.def
  c81342d62b7c673dddb01c2fe022e31c  gcc/config/avr/constraints.md
  6f86a74aad4c6d406125533121fac7c8  gcc/config/avr/driver-avr.cc
! 1008ab86977d8a828903d64e60330ac1  gcc/config/avr/elf.h
  ca321a5148953102f755e05b59b7bb1a  gcc/config/avr/gen-avr-mmcu-specs.cc
  18da6b098212aae9f6f9b0200eeb9134  gcc/config/avr/gen-avr-mmcu-texi.cc
  b3573dd42f78369fa82623b922370aa4  gcc/config/avr/genmultilib.awk
--- 3664,3670 ----
  5f50128af85c97f8a945289b214c6796  gcc/config/avr/builtins.def
  c81342d62b7c673dddb01c2fe022e31c  gcc/config/avr/constraints.md
  6f86a74aad4c6d406125533121fac7c8  gcc/config/avr/driver-avr.cc
! 57ea28d3d73dd13f408b1bd56d829b03  gcc/config/avr/elf.h
  ca321a5148953102f755e05b59b7bb1a  gcc/config/avr/gen-avr-mmcu-specs.cc
  18da6b098212aae9f6f9b0200eeb9134  gcc/config/avr/gen-avr-mmcu-texi.cc
  b3573dd42f78369fa82623b922370aa4  gcc/config/avr/genmultilib.awk
*************** ab72cfcef8400549b3b4d4d318e4955e  gcc/te
*** 65292,65297 ****
--- 65292,65298 ----
  08cf164f5014eeb82272fbef22e3878f  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr.c
  4211e73819bb661ddd18271cf8dab0e5  gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr_p.c
  cfb4125c4550d5cf153bac3dcd2886ad  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr101016.c
+ 0584832f92d1fa9172d7b5f0af9daf91  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c
  a8d3fa3695fbd309660950fb5598ecaf  gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
  f1860ef4320f7f2a6a4791bdb0c063ba  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c
  5d7653e2d5007d0c5a0f2368f9b07c02  gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c
diff -Nrcpad gcc-14-20251031/gcc/ChangeLog gcc-14-20251107/gcc/ChangeLog
*** gcc-14-20251031/gcc/ChangeLog	Fri Oct 31 22:32:19 2025
--- gcc-14-20251107/gcc/ChangeLog	Fri Nov  7 22:32:58 2025
***************
*** 1,3 ****
--- 1,33 ----
+ 2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/122516
+ 	* config/avr/elf.h (SUPPORTS_SHF_GNU_RETAIN): Define if
+ 	HAVE_GAS_SHF_GNU_RETAIN.
+ 
+ 2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	* config/avr/avr.cc (avr_output_addr_vec): Output
+ 	a valid opcode prior to the first gs() label provided:
+ 	- The code is compiled for an arch that has AVR-SD mcus, and
+ 	- the function has a "section" attribute, and
+ 	- the function has a gs() label addresses switch/case table.
+ 
+ 2025-11-03  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2025-11-02  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/122527
+ 	* config/avr/avr.cc (avr_load_libgcc_p): Return false if
+ 	the address-space is not ADDR_SPACE_FLASH.
+ 	(avr_out_lpm_no_lpmx [addr=REG]): Handle sizes of 3 and 4 bytes.
+ 
  2025-10-30  Guo Jie  <guojie@loongson.cn>
  
  	Backported from master:
diff -Nrcpad gcc-14-20251031/gcc/DATESTAMP gcc-14-20251107/gcc/DATESTAMP
*** gcc-14-20251031/gcc/DATESTAMP	Fri Oct 31 22:32:20 2025
--- gcc-14-20251107/gcc/DATESTAMP	Fri Nov  7 22:32:58 2025
***************
*** 1 ****
! 20251031
--- 1 ----
! 20251107
diff -Nrcpad gcc-14-20251031/gcc/config/arm/mve.md gcc-14-20251107/gcc/config/arm/mve.md
*** gcc-14-20251031/gcc/config/arm/mve.md	Fri Oct 31 22:32:20 2025
--- gcc-14-20251107/gcc/config/arm/mve.md	Fri Nov  7 22:33:08 2025
***************
*** 1267,1274 ****
  (define_insn "mve_vbicq_f<mode>"
    [
     (set (match_operand:MVE_0 0 "s_register_operand" "=w")
! 	(and:MVE_0 (not:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w"))
! 			      (match_operand:MVE_0 2 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
    "vbic\t%q0, %q1, %q2"
--- 1267,1274 ----
  (define_insn "mve_vbicq_f<mode>"
    [
     (set (match_operand:MVE_0 0 "s_register_operand" "=w")
! 	(and:MVE_0 (not:MVE_0 (match_operand:MVE_0 2 "s_register_operand" "w"))
! 			      (match_operand:MVE_0 1 "s_register_operand" "w")))
    ]
    "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
    "vbic\t%q0, %q1, %q2"
diff -Nrcpad gcc-14-20251031/gcc/config/avr/avr.cc gcc-14-20251107/gcc/config/avr/avr.cc
*** gcc-14-20251031/gcc/config/avr/avr.cc	Fri Oct 31 22:32:20 2025
--- gcc-14-20251107/gcc/config/avr/avr.cc	Fri Nov  7 22:33:09 2025
*************** avr_load_libgcc_p (rtx op)
*** 4368,4374 ****
  
    return (n_bytes > 2
  	  && !AVR_HAVE_LPMX
! 	  && avr_mem_flash_p (op));
  }
  
  /* Return true if a value of mode MODE is read by __xload_* function.  */
--- 4368,4375 ----
  
    return (n_bytes > 2
  	  && !AVR_HAVE_LPMX
! 	  && avr_mem_flash_p (op)
! 	  && MEM_ADDR_SPACE (op) == ADDR_SPACE_FLASH);
  }
  
  /* Return true if a value of mode MODE is read by __xload_* function.  */
*************** avr_out_lpm_no_lpmx (rtx_insn *insn, rtx
*** 4493,4498 ****
--- 4494,4539 ----
  	    avr_asm_len ("sbiw %2,1", xop, plen, 1);
  
  	  break; /* 2 */
+ 
+ 	/* cases 3 and 4 are only needed with ELPM but no ELPMx.  */
+ 
+ 	case 3:
+ 	  if (REGNO (dest) == REG_Z - 2
+ 	      && !reg_unused_after (insn, all_regs_rtx[REG_31]))
+ 	    avr_asm_len ("push r31", xop, plen, 1);
+ 
+ 	  avr_asm_len ("%4lpm $ mov %A0,%3 $ adiw %2,1", xop, plen, 3);
+ 	  avr_asm_len ("%4lpm $ mov %B0,%3 $ adiw %2,1", xop, plen, 3);
+ 	  avr_asm_len ("%4lpm $ mov %C0,%3", xop, plen, 2);
+ 
+ 	  if (REGNO (dest) == REG_Z - 2)
+ 	    {
+ 	      if (!reg_unused_after (insn, all_regs_rtx[REG_31]))
+ 		avr_asm_len ("pop r31", xop, plen, 1);
+ 	    }
+ 	  else if (!reg_unused_after (insn, addr))
+ 	    avr_asm_len ("sbiw %2,2", xop, plen, 1);
+ 
+ 	  break; /* 3 */
+ 
+ 	case 4:
+ 	  avr_asm_len ("%4lpm $ mov %A0,%3 $ adiw %2,1", xop, plen, 3);
+ 	  avr_asm_len ("%4lpm $ mov %B0,%3 $ adiw %2,1", xop, plen, 3);
+ 	  if (REGNO (dest) != REG_Z - 2)
+ 	    {
+ 	      avr_asm_len ("%4lpm $ mov %C0,%3 $ adiw %2,1", xop, plen, 3);
+ 	      avr_asm_len ("%4lpm $ mov %D0,%3", xop, plen, 2);
+ 	      if (!reg_unused_after (insn, addr))
+ 		avr_asm_len ("sbiw %2,3", xop, plen, 1);
+ 	    }
+ 	  else
+ 	    {
+ 	      avr_asm_len ("%4lpm $ push %3 $ adiw %2,1", xop, plen, 3);
+ 	      avr_asm_len ("%4lpm $ mov %D0,%3", xop, plen, 2);
+ 	      avr_asm_len ("pop $C0", xop, plen, 1);
+ 	    }
+ 
+ 	  break; /* 4 */
  	}
  
        break; /* REG */
*************** avr_output_addr_vec (rtx_insn *labl, rtx
*** 14287,14292 ****
--- 14328,14343 ----
  
    app_disable();
  
+   // AVR-SD: On functional safety devices, each executed instruction must
+   // be followed by a valid opcode.  This is because instruction validation
+   // runs at fetch and decode for the next instruction and while the 2-stage
+   // pipeline is executing the current one.  There is no multilib option for
+   // these devices, so take all multilib variants that contain AVR-SD.
+   const bool maybe_sd = (AVR_HAVE_JMP_CALL
+ 			 && (avr_arch_index == ARCH_AVRXMEGA2
+ 			     || avr_arch_index == ARCH_AVRXMEGA3));
+   bool uses_subsection = false;
+ 
    // Switch to appropriate (sub)section.
  
    if (DECL_SECTION_NAME (current_function_decl)
*************** avr_output_addr_vec (rtx_insn *labl, rtx
*** 14298,14303 ****
--- 14349,14355 ----
  
        switch_to_section (current_function_section ());
        fprintf (stream, "\t.subsection\t1\n");
+       uses_subsection = true;
      }
    else
      {
*************** avr_output_addr_vec (rtx_insn *labl, rtx
*** 14320,14328 ****
  	       AVR_HAVE_JMP_CALL ? "a" : "ax");
      }
  
-   // Output the label that preceeds the table.
- 
    ASM_OUTPUT_ALIGN (stream, 1);
    targetm.asm_out.internal_label (stream, "L", CODE_LABEL_NUMBER (labl));
  
    // Output the table's content.
--- 14372,14392 ----
  	       AVR_HAVE_JMP_CALL ? "a" : "ax");
      }
  
    ASM_OUTPUT_ALIGN (stream, 1);
+ 
+   if (maybe_sd && uses_subsection)
+     {
+       // Insert a valid opcode prior to the first gs() label.
+       // Any valid opcode will do.  Use CLH since it disassembles
+       // more nicely than NOP = 0x0000.  This is all GCC can do.
+       // Other cases, like inserting CLH after the vector table and
+       // after the last instruction, are handled by other parts of
+       // the toolchain.
+       fprintf (stream, "\tclh\n");
+     }
+ 
+   // Output the label that precedes the table.
+ 
    targetm.asm_out.internal_label (stream, "L", CODE_LABEL_NUMBER (labl));
  
    // Output the table's content.
diff -Nrcpad gcc-14-20251031/gcc/config/avr/elf.h gcc-14-20251107/gcc/config/avr/elf.h
*** gcc-14-20251031/gcc/config/avr/elf.h	Fri Oct 31 22:32:20 2025
--- gcc-14-20251107/gcc/config/avr/elf.h	Fri Nov  7 22:33:09 2025
***************
*** 17,22 ****
--- 17,35 ----
     along with GCC; see the file COPYING3.  If not see
     <http://www.gnu.org/licenses/>.  */
  
+ /* defaults.h requires HAVE_INITFINI_ARRAY_SUPPORT to be present
+    in order for attribute "retain" to be recognized.  This is due
+    to some quirks in crtstuff.h -- which isn't even used by avr.
+    All we need is that Binutils supports the "R"etain section flag.
+    If that's the case, define SUPPORTS_SHF_GNU_RETAIN so that
+    defaults.h doesn't define it to 0.  */
+ #if defined(IN_GCC) && !defined(USED_FOR_TARGET) && !defined(GENERATOR_FILE)
+ #include "auto-host.h" /* HAVE_GAS_SHF_GNU_RETAIN */
+ #if HAVE_GAS_SHF_GNU_RETAIN
+ #undef SUPPORTS_SHF_GNU_RETAIN
+ #define SUPPORTS_SHF_GNU_RETAIN 1
+ #endif
+ #endif
  
  /* Overriding some definitions from elfos.h for AVR.  */
  
diff -Nrcpad gcc-14-20251031/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c gcc-14-20251107/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c
*** gcc-14-20251031/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20251107/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c	Fri Nov  7 22:34:28 2025
***************
*** 0 ****
--- 1,31 ----
+ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+ /* { dg-add-options arm_v8_1m_mve_fp } */
+ /* { dg-additional-options "-O2" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ /* PR target/122223.  */
+ 
+ #include <arm_mve.h>
+ 
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+ /*
+ **foo:
+ **	...
+ **	vmov.f32	(q[0-9]+), #0.0  @ v4sf
+ **	...
+ **	vbic	q[0-9]+, q[0-9]+, \1
+ **	...
+ */
+ float32x4_t foo() {
+   float32x4_t a = vdupq_n_f32(1.0f); /* 0x3f800000 */
+   float32x4_t b = vbicq_f32(a, a);   /* 0x3f800000 & ~0x3f800000 => 0x00000000 */
+   float32x4_t c = vbicq_f32(a, b);   /* 0x3f800000 & ~0x00000000 => 0x3f800000 */
+   return c;
+ }
+ 
+ #ifdef __cplusplus
+ }
+ #endif
